Processing Near Memory

Modern computer processors spend significant amount of time and energy on transferring data between cores and memory devices. The concept of Processing in Memory (PIM) was first introduced in the 1990's to overcome this problem by integrating single-instruction, multiple-data (SIMD) array into the memory. However, continued technology scaling driven by Moore's Law has been precluding the adoption of PIM architecture. The recent research thrust for processing near memory is propelled by changes in application trends, e.g., big-data problems, in which memory and storage systems become a critical bottleneck. Our research interests lie in enhancing the energy efficiency and performance of emerging applications such as graph algorithms and neural network algorithms via the notion of processing near memory.


Neural Network Acceleration

A family of neural networks (NN) provide state-of-the-art accuracy among machine learning algorithms, and general purpose graphics processing units (GPGPU) have paved the way for it. Dense floating-point vector and matrix operations of neural networks fit perfectly to GPU. However, GPU has disadvantages when it comes to power consumption. We are exploring various architectural alternatives to implement faster and power-efficient neural network accelerators. Our research interests include specialized NN cores integrated with on-die embedded DRAM (eDRAM) or 3D-stacked memories, field-programmable gate arrays (FPGA) that are known to have superior power efficiency to conventional CPU or GPU, and software support (i.e., operating systems and compilers) to efficiently manage such hardware.


Modeling And Simulations

The performance of computing systems can no longer be masked in a single scope of analysis. It requires holistic modeling and simulation framework that connects microarchitecture components (e.g., cores, caches, network-on-chip, memory controllers and devices, I/O controllers) to physics models encompassing power, temperature, reliability, voltage variation, etc. The integrated framework serves as a vehicle for advanced microarchitecture research and design space explorations. However, the development of large-scale, full-system modeling and simulation framework needs tremendous engineering efforts and problems to solve. Our interests include devising modeling methodologies and simulation infrastructure that will benefit the computer architecture research community.


Acknowledgement

We are grateful for research funding from the following sponsors.